An embedded system refers to a specialized computer system designed to perform dedicated functions within a larger mechanical or electrical system. It typically consists of a combination of hardware and software components tailored to perform specific tasks or functions. Embedded systems play a crucial role in mobile robotics, UAV construction and edge AI. Such systems are characterized by their real-time operation, reliability and efficiency in executing predetermined functions, often with limited resources such as processing power, memory and energy. In remote areas, for example, everything is run off batteries or generators. Consequently, many embedded systems are engineered to incorporate various techniques to extend battery life. The others simply need to consume less energy based on other factors. As a result, there’s an increasing demand for designs that minimize energy usage while maintaining high performance. In this article we are going to elaborate on the strategies for achieving low-power designs and highlight their significance in embedded systems.

The Need for Low-Power Design

Low-power design involves strategies and approaches aimed at decreasing the energy usage of electronic devices and refers especially to the underlying embedded systems upon which such devices operate. Examples of such devices are battery-powered devices, processors, IoT wireless sensor networks and many more. Through the application of low-power design methods, engineers can create high-quality and reliable equipment which consume considerably less energy without any indication of performance degradation. The need for low-power devices arises from several factors:

• Power sources are often limited and the disruption in the energy supply can result in adversities. This is particularly true for battery-powered devices in military situations where power outages can cost lives. That’s why defense is always looking for lower power consumption in airborne and ground vehicle applications.
• Portability of everyday devices (notebooks, smartphones, etc.) which will have prolonged battery life is one of the concerns of device manufacturing companies. In today’s world, it is a common tendency for customers to have a preference for devices with extended battery life.
• Low-power design will certainly have a huge positive impact on the environment as a large amount of electricity is wasted through devices connected to the grid. The decrease in the electricity consumption of such devices will result in less costs and will cause less damage to the environment.
• In embedded systems, high power consumption can result in a significant amount of heat generation damaging the system components. The reduction of generated heat is one of the concerns for military equipment production. As a fact, the overall decrease in power consumption will considerably reduce the generated heat. Consequently, initially employing low-power design techniques will protect the system from unexpected side effects due to thermal issues.
• Less heat generation can lead to improved performance and reliability of the embedded system. Overheating can cause performance degradation or even hardware failures, so by keeping temperatures within acceptable limits, low-power designs contribute to overall reliability and durability of the system.

Key Principles of Low-Power Design

To grasp the fundamental principles of low-power design, it’s imperative to dive into power consumption basics, sleep modes, clock gating techniques and voltage scaling strategies. This exploration will shed light on how each aspect contributes to the creation of energy-efficient embedded systems.

Power Consumption Basics

Power consumption indicates how much electrical energy a device or a system uses to perform its functions or operations. There are two primary sources of power consumption in electronic devices – static and dynamic. Devices consume static power when idle and dynamic power during active use. Reducing both static and dynamic power consumption is essential for creating low-power designs achieved through the means of efficient components and optimized circuits. Understanding consumption allows informed decisions on resource allocation and environmental impact mitigation. Embracing energy-efficient practices drives towards sustainability while ensuring reliable access to necessities.

Power Management and Sleep Modes

Implementing sleep modes and power states can significantly reduce power consumption in embedded systems. Sleep modes enable devices to enter low-power states when not performing tasks, therefore conserving energy. Power states define consumption levels based on system activity and performance needs. Selecting appropriate modes ensures optimal power usage and performance while maintaining efficiency.

All sleep modes are accessible from active mode, where the CPU executes application code. Upon entering sleep mode, program execution halts, and the device relies on interrupts or a reset for waking up. The application code determines the timing and choice of sleep mode. Enabled interrupts from peripherals and reset sources can return the CPU from sleep to active mode. Furthermore, power reduction registers offer means to halt individual peripheral clocks via software control. This action freezes the peripheral’s current state, eliminating its power consumption. Consequently, power usage is minimized in both active mode and idle sleep modes, facilitating more nuanced power management than sleep modes alone.

Here are several examples of low-power modes:

Sleep Mode: In this mode, the device reduces its power consumption by powering down non-essential components while retaining data in memory. The CPU typically enters a low-power state, halting its operation until an external event, such as a button press or an interrupt, wakes it up.

Deep Sleep Mode: This mode is an even lower power state compared to sleep mode. In deep sleep, the device shuts down most of its non-essential functions, including reducing power to the CPU and peripherals. This mode is commonly used in battery-powered devices to prolong battery life during extended periods of inactivity.

Standby Mode: This mode is similar to sleep mode but may involve a slightly higher level of power consumption. In this mode, the device reduces power to most components, but some essential functions remain active to enable quick recovery. It’s commonly used in devices like TVs and remote controls, where rapid responsiveness is necessary.

Clock Gating for Dynamic Power Reduction

Clock gating is a technique aimed at reducing dynamic power consumption by selectively switching off unnecessary clock signals to registers using control signals, all while ensuring functional correctness. By turning off the clock to idle parts of a device, it conserves power, directing it only to active components and minimizing waste. Implementing clock gating in embedded systems can substantially reduce power usage, particularly in devices with numerous components or intricate functionalities.

Typically, the assignment to a register might be conditional, as depicted above. When EN is 0, the clocks to the registers can be stopped otherwise, the registers will switch states on each clock cycle, which dissipates power.

Voltage Scaling Strategies

Voltage scaling strategies in low-power design involve adjusting the core supply voltage to align with the system’s performance needs. Decreasing voltage decreases power consumption, but it can impact performance, necessitating a careful balance between the two. Techniques like adaptive voltage scaling and dynamic voltage scaling are commonly used in embedded systems to find this balance, often coupled with frequency scaling to maintain acceptable performance levels while reducing power consumption. Dynamic Voltage and Frequency Scaling (DVFS) is a power management technique that adjusts the voltage and frequency of the device’s CPU dynamically based on workload demands. During periods of low activity, the CPU voltage and frequency are decreased to save power, while they are increased during high-demand tasks to maintain performance. These strategies are particularly crucial in portable devices where battery life is a primary concern.

Design Techniques for Low-Power Embedded Systems

When thinking about the low-power embedded systems, there is no single rule that applies to every type of requirement. Rather it is a combination of a system design, circuit design and firmware design all combined and working together to deliver the best performance per watt. Embedded engineers construct embedded systems using various low-power techniques, allowing for adaptable control over device’s energy usage based on its activities and operating patterns. 

Hardware Techniques for Low-Power Design

In the realm of low-power embedded system design, the selection of hardware components plays a pivotal role. Optimal choices can significantly influence the system’s overall power consumption. This section will delve into various hardware techniques, such as component selection for low-power embedded systems, employing energy-efficient microcontrollers and processors, and integrating sensors designed for minimal energy consumption.

Energy-efficient component selection: Picking the right components is crucial for any electronic system, affecting design, layout, and power usage. When it comes to low-power designs, choosing components wisely is even more critical. To reduce power consumption in embedded systems, we need to focus on factors like operating voltage, idle/standby current, and overall efficiency of the components. Opting for parts with lower consumption can significantly cut down on energy usage in the system.

Energy-efficient microcontroller and processor selection: Embedded systems rely heavily on microcontrollers and processors, and their power efficiency is crucial in determining overall power usage. When choosing a microcontroller or a processor, prioritize components with low operating voltages, effective sleep modes, and power-saving capabilities like clock gating and voltage scaling. Incorporating these features ensures decreased power consumption without compromising performance, making them ideal choices for energy-conscious designs.

One example of a low-power AI accelerator is Hailo-15 that can process multiple video streams in real time on a single device with robust onboard network connectivity. It offers very high AI performance of 26 TOPS and very low power consumption of 2.5W which makes it perfect for AI computing and for mission-critical applications with power consumption reduced by approximately 70% compared to GPU based solutions. Another example is Intel’s hybrid CPU architecture, which combines “P cores” for high-intensity computational tasks and “E cores” for handling less-intensive tasks while maximizing energy-efficiency, addressing the requirements of modern computing.

Energy-efficient process node selection: When talking about semiconductor ICs, selecting newer devices with 5nm technology node vs 10nm reduces power by 40%, 3nm improves 45% over 5nm, 14nm reduces power by 50% over 28nm etc. Power efficiency can be dramatically improved when using IC built on top of latest technology node.

Energy-efficient FPGA design: Field-Programmable Gate Array (FPGA) devices offer the advantage of flexibility and customization in hardware design. In certain applications, this flexibility can lead to power reduction by combining multiple functions into a single FPGA device rather than using discrete components.

Energy-efficient sensor selection: Sensors play a crucial role in embedded systems, gathering data from the surroundings or user interactions. Opting for sensors with minimal power demands that can transition into low-power modes when inactive is a key. Furthermore, explore sensors equipped with built-in power management functionalities like automatic sleep modes and adjustable sample rates to enhance energy efficiency even further. By selecting sensors with these capabilities, overall power consumption in the system can be significantly reduced, ensuring efficient operation.

Software Techniques for Low-Power Design

It is generally more effective to begin monitoring the energy consumption as early as possible to access the potential risks of high energy consumption points during the implementation process. When the software is already implemented and integrated, it is usually more difficult and expensive to eliminate such issues. On the other hand, energy consumption levels are directly proportional to computational complexities and improving one will result in indirect improvement of the other. Therefore, it is a good idea to introduce several software development techniques to achieve low-power in embedded systems.

Code optimization: Optimize algorithms to reduce the overall CPU utilization. Try using efficient algorithms and data structures to reduce the computational complexity. Frequently, there is a tradeoff between faster processing/larger code size vs slower processing/smaller code size. Usually, optimizing a code for speed vs size is a better choice.

Event-Based Task Scheduling: Events are generated to trigger the system to perform some work. Once the processor finishes the requested task, it goes back to idle state allowing it to remain in low-power modes for longer durations. Incorporating sleep modes in the code putsthe processor or specific peripherals into low-power states during periods of inactivity. Use of efficient task scheduling algorithms minimizes wake-up times and ensures that tasks are executed in a power-efficient manner.

Optimized Data and I/O Access: Minimizing unnecessary data transfers and using efficient data structures to reduce power consumption during memory access operation such as unnecessary copying of data, especially when large blocks of memory are allocated. Reducing the frequency of I/O operations and using techniques such as batch processing to minimize power consumption during data transfers. Optimizing cache usage to minimize memory accesses and reduce power consumption associated with accessing external memory.

Code Profiling and Optimization: Profiling code to identify power-hungry sections and optimizing them to reduce power consumption without sacrificing performance is a major area for optimization. Additionally, compilers that optimize code for low-power execution can significantly reduce energy consumption by minimizing unnecessary operations and maximizing sleep modes utilization. Debugging tools that provide insights into power consumption behavior during development help identify and solve power inefficiencies early in the design process.

Using Low-Power Communication Protocols

The adoption of low-power communication protocols within embedded systems is paramount for achieving energy efficiency while maintaining reliable data transmission. This section aims to offer insights into energy-efficient communication standards and wireless protocols customized for low-power applications.

Wireless Protocols for Low-Power Design

Wireless communication is gaining popularity in embedded systems for its adaptability and scalability. However, without energy-efficient implementation, it can lead to considerable power consumption. Several wireless protocols, tailored for low-power applications, have emerged to address this concern, including:

• BLE is designed for low-power devices and applications with infrequent data transmission.
• NB-IoT technology is designed to provide low-power wide area network (LPWAN) connectivity for IoT devices. This means that NB-IoT devices have very low-power consumption compared to traditional cellular devices, which enables them to operate on a single battery charge for years.
• Z-Wave is a highly efficient and low-energy technology. While the smart home hub requires a constant power supply to keep the network up and running, many Z-Wave devices operate on battery power alone for a year or more before requiring replacement.
• LoRa is ideal for IoT applications requiring low data rate transmission over long distances.
• ZigBee is a low-power, low-data-rate wireless communication protocol commonly used in home automation and industrial control systems.

Conclusion

Tauro Technologies can dramatically reduce system cost, size, and power requirements through optimized hardware and software design, and meticulous component selection. Our diverse portfolio of high-efficiency modules and integrated systems is engineered to meet the most demanding industrial standards. Contact us to explore how we can enhance your systems.

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What is an indoor location tracking system?

Indoor location tracking system locates and tracks the movement of people or objects inside buildings. Indoor location tracking is enabled by indoor positioning systems, a network of electronic devices and computer software used to locate people or objects where and when GPS is inaccurate or fails completely. Furthermore, the accuracy of the GPS is often times less than what’s required to track objects indoors. Although the terms “indoor location tracking” and “indoor positioning” are interchangeable, there are currently many different types of technologies used to calculate and provide real-time location data.

In this blog post, we’ll talk about the changing world of indoor location tracking systems, delve into the countless applications in the industry, uncover the benefits they bring, and speculate on the exciting future prospects of indoor location tracking systems.

How do indoor location tracking systems work?

Indoor location tracking systems, also known as indoor positioning systems (IPS) detect and track object location using a variety of sensors. IPS normally uses transmitters (e.g. tags, badges) and receivers (e.g. beacons)  to provide precise location information for tracked assets. Transmitters identify people or assets and can be attached, embedded, or worn. Receivers capture signals from transmitters and send the data to the central management system. These systems are widely used across various industries to track personnel, valuable equipment, materials, and vehicles.

GPS and IPS services are sometimes mixed up due to similar tasks and acronyms. GPS works best outdoors, relying on satellites for location. Indoors, GPS signals are unreliable and lack precision in crowded spaces. Ongoing research may bring new indoor GPS options in the future.

Technologies Used in Indoor Location Tracking Systems

An indoor positioning system helps find people or objects inside a building. It has two main parts: anchors and position tags. Anchors, like beacons or relays, are placed strategically around the premises. People or things carry position tags. Anchors actively locate these tags or provide location/context information for the device.

There are different ways to track objects indoors: , Wi-Fi, Magnetic Field Detection, Near Field Communication (NFC), Ultra-wideband (UWB) radio, and UHF RFID. Each method has its own level of accuracy, cost, power usage, and ease of use. Since there’s no obvious best choice, sometimes it’s difficult to determine which technology is most suitable. Let’s look at the most common options.

• Bluetooth Based Indoor Positioning

Bluetooth based indoor positioning is a really promising technology for expanding indoor tracking in various fields, such as logistics, healthcare, manufacturing, retail, warehouses, and smart buildings.

Bluetooth proves to be a highly effective choice for indoor localization, offering real-time meter-level accuracy with cost-effective and power-efficient hardware. Its simplified deployment is due to technological standardization, ensuring cross-vendor device compatibility. The widespread adoption of Bluetooth in existing devices further contributes to its ease of use, making it a versatile solution for diverse applications such as logistics, healthcare, manufacturing, retail, warehouses, and smart buildings.

BLE (Bluetooth Low Energy) IPS solution uses beacons or sensors to locate and detect transmitting Bluetooth devices such as track labels, and smartphones throughout the indoor area. Location data obtained from sensors or sent from beacons to mobile devices is then absorbed by various applications and translated into insights that support multiple location-aware use cases.

Bluetooth based solution supports two architectures, one based on the radio signal’s angle of arrival at the anchor point, the other based on its angle of departure.

In AoA based scenario, a mobile device has a tag that sends a Bluetooth signal with direction information. Antenna arrays measure these signals to find the angle of arrival using a network-based engine. The slight phase differences in the signals received by antennas help calculate the angle of arrival.

With AoD, a mobile device receives Bluetooth signals from antenna arrays. The device uses signal measurements to find the direction from which the signal departs the antenna array. The slight phase differences in signals received help calculate the angle of departure given the antenna array geometry is known.

To pinpoint a mobile device indoors, a single anchor with multiple antennas can be used to figure out its location relative to the anchor. For higher accuracy, multiple stationary anchors with multi-antenna arrays are employed. By triangulating signals from several anchors and finding their intersection, the exact position of the device can be calculated.

• Ultra-wideband (UWB) indoor positioning

UWB uses a train of impulses instead of a modulated sine wave to transmit information. It’s perfect for precision applications because of its unique characteristic. Since the pulse rising edge is extremely sharp it allows the receiver to accurately measure the arrival time of the signal. Furthermore, the pulses are extremely narrow, usually lasting less than two nanoseconds.

The signals’ nature allows UWB pulses to be resistant to multipath effects and be identified even in noisy environments. UWB has significant ranging capability advantages over traditional narrowband signals due to these traits. Also, due to the strict spectral mask, the transmit power lies at the noise floor, which means that UWB does not interfere with other radio communication systems operating in the same frequency bands. It just increases the overall noise floor, a principle that is very similar to spread spectrum technologies (CDMA).

• Wi-Fi indoor positioning

The use of Wi-Fi can enable the detection and tracking of people, devices, and assets. Indoor positioning can be easily calculated using existing Wi-Fi access points. Wi-Fi can be found everywhere, particularly indoors, used by nearly all wireless devices and network infrastructures – including smartphones, computers, IoT devices, routers, APs, and more. To detect and locate Wi-Fi transmitters, such as smartphones and tracking tags, Wi-Fi indoor positioning solutions employ existing Wi-Fi access points or Wi-Fi enabled sensors. WI-Fi-based positioning systems can use different methods to determine the location of the devices.

Wi-Fi Positioning Using Access Points: Access points are installed indoors to locate devices and use already existing Wi-Fi infrastructure. Transmissions from nearby Wi-Fi devices, both on and off the network, can be detected by building APs. The location data is sent to a server and central IPS which are used to determine the position of a device.

Wi-Fi Positioning Using Sensors: Sensors that are deployed in fixed position indoors passively detect and locate transmissions from smartphones, asset tracking tags and other Wi-Fi devices. The sensor’s collected location information is then transmitted to a server and incorporated by the central indoor positioning system (IPS).

Wi-Fi positioning methods often rely on the Received Signal Strength Indicator (RSSI) to figure out where the device is located. In applications using RSSI, several Wi-Fi access points, set in fixed positions, pick up signals from transmitting Wi-Fi devices and measure the strength of those signals. The location engine then uses multilateration algorithms to analyze this data and estimate the position of the transmitting devices.

Indoor Location Tracking Benefits

• Enhanced User Convenience

This system expands the comfort of the users in indoor areas, for example, thanks to IPS, users no longer need to indicate their current location, when moving from one point to another in the indoors. Also, they no longer need to worry about doors, turns or other obstacles, because now they can see them in advance on the map in real-time. Modern day warehouses are like complex living organisms with rapidly moving machinery, products, robots, and personnel. Real-time tracking of the locations of the moving pieces is necessary for efficient and effective functioning on a minute-by-minute basis.

In an application developed by Tauro Technologies used UWB radio based solution to assist firefighters and first-responders on the scene during an incident. Fast, accurate decisions can save lives, keep the first-responders safe and are dependent on accurate real-time information to make mission critical split second decisions. Tauro Technologies developed the hardware and triangulation software system for indoor location tracking to meet those requirements.

• Exclusion of possible human errors

Asset tracking also eliminates potential human errors. People can often get tired or have a lapse in judgment and accidentally misplace valuable assets or leave a highly sensitive location unstaffed. Indoor location tracking systems can provide alerts when people or assets leave a predefined area also known as geofencing. Users can opt to receive an email, text or voice notification if someone or something enters or leaves the area.

• Swift Incident Response

Indoor location tracking ensures the safety by providing real-time location data during emergencies. Lone workers, when out of communication, can trigger assistance requests, allowing security and emergency services to pinpoint their exact location. Leadership can identify the nearest security officers to a reported incident and efficiently direct them for intervention.

• Location-based marketing

The fusion of indoor navigation and positioning creates location-based marketing opportunities. Imagine tailoring a more personalized experience and special offers when shoppers linger at the pasta aisle or greet stadium visitors with personalized messages based on ticket sales data. This not only enhances user engagement but also increases revenue and profits. Offering marketing opportunities through push notifications to exhibitors, sponsors, or partners makes your venue more appealing and has the potential to boost your ROI.

Indoor Location Tracking Use Cases

The indoor positioning system is a reliable and convenient modern solution that can be used in various positioning solutions such as Asset tracking​, Item finding, Point of interest (POI) information, access control and security, people tracking and consumer behavior analysis, proximity marketing.

Below are some examples of indoor positioning system applications:

• Airport and Hospitality: Airports and hotels can track heavy equipment, tools, passenger baggage and visitors to improve daily operations, increase safety, and increase customer satisfaction.
• Medical Institutions and Healthcare: High-quality healthcare services allow patients to get the treatments they need without potentially harmful delays. By using this technology, staff, patients, and equipment like beds and wheelchairs can be easily located. It means better attendance checking, effective supervision, and better equipment maintenance are at your fingertips.
• Parking: Indoor location systems can be used to guide drivers to available parking spaces in indoor parking garages or lots.
• Warehouse: Real-time package location, inventory monitoring, and forklift high-precision positioning bring valuable information into the ERP and provide reliability and safety into warehouses.
• Museum: Mobile navigation, precise positioning, and low-cost tags bring new values to tourism location services. IPS can be used to enhance the visitor experience in museums by providing location-based information and interactive exhibits.

Challenges of Indoor Location Tracking Systems

Indoor navigation presents typical challenges in contrast to outdoor environments, where GPS technology is prevalent. The complex task of indoor positioning is made worse by the building layouts, which require specialized solutions to address the unique intricacies of navigating within enclosed spaces.

Here are some representations of the challenges of Indoor Location Tracking Systems and their solutions:

• Complex Building Layouts

Challenge: Large public places are often complicated with many floors, making it hard to keep track of and update the tracking information. These places change a lot due to renovations or temporary setups, so we need navigation systems that can adapt quickly in real-time.

Solution: Employing indoor mapping tools that facilitate collaboration and crowd-sourced mapping can play a crucial role in preserving accurate and current layouts. These tools empower users and venue owners to actively participate in the mapping process, guaranteeing the continued relevance and precision of the navigation system.

• Signal Interference

Challenge: In areas with high device density, the abundance of devices and wireless networks may cause signal interference. Such interference can compromise the reliability of indoor positioning technologies, leading to navigation inaccuracies and inconsistencies.

Solution: Implement machine learning techniques to filter noise and interference, enhancing indoor tracking performance. By combining machine learning with BLE and UWB technologies, an adaptive and interference-resistant solution can be achieved, significantly improving indoor tracking performance in challenging environments.

• Battery Consumption

Challenge: Indoor navigation apps often drain device batteries quickly, posing an issue for users without easy access to charging.

Solution: Optimizing the indoor navigation app’s energy consumption is crucial. Developers should focus on reducing unnecessary background processes and utilizing efficient programming techniques. Additionally, incorporating low-power mode options can help extend device battery life while using the navigation application.

Conclusion

Tauro Technologies’ experience in RF communications, power management as well as firmware and software design enables the development of reliable and energy efficient location tracking systems. Tauro Technologies has experience in a wide variety of applications including military, scientific, medical, industrial robotics, and communications. Get in touch with us for more information.

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It is common for the majority to get confused with the terms “Embedded firmware” and “Embedded software”. In this article, we will discuss differences and similarities between embedded software and firmware and offer examples to help the reader differentiate between those two.

We will kick things off by getting to know what an embedded system is and exploring its core components. From there, we’ll dive into the challenges that developers encounter, from the intricate world of clocking mechanisms to navigating the nuances of firmware and managing power efficiently.

What is an Embedded System?

An embedded system is a computer system with a specific function, composed of a microprocessor, memory, and various input/output peripherals. These systems are often found within larger mechanical or electronic assemblies, hence the term “embedded”.

Embedded systems come in various forms, with some being standalone devices, while others function as integral parts of a larger system.

These systems have a presence in a wide range of applications, including industrial machines, consumer electronics, agricultural and processing equipment, automobiles, medical devices, cameras, digital watches, household appliances, airplanes, vending machines, toys, and even modern mobile devices.

Embedded systems consist of hardware and software components. The hardware includes microprocessor or microcontroller, memory, input/output interfaces, timers, and a power supply. These components require software and firmware to bring them to life and function as a system.

Challenges in Embedded Systems

Embedded product developers grapple with a multitude of challenges as they strive to design and develop efficient and reliable embedded systems. Here, we’ll explore some of the key challenges:

Clocking Challenges

• Synchronization: Achieving precise clock synchronization across different components within an embedded system is crucial for seamless operation. Variations in clock timing can lead to synchronization issues and data errors.
• Low Power Clocking: Balancing the need for high-performance clock speeds with power efficiency is a constant challenge, especially in battery-operated devices.
• Clock Domain Crossing: Managing different clock domains within a single system can be complex and requires careful attention to avoid synchronization problems.

Power Management Challenges

• Energy Efficiency: Balancing performance and power consumption is critical, especially in battery-powered devices. Achieving optimal energy efficiency while maintaining functionality is a constant struggle.
• Dynamic Power Management: Efficiently managing power in dynamic workloads, where system components operate at varying levels of activity, is a complex task.
• Thermal Management: Preventing overheating and thermal issues in embedded systems, which can affect performance and longevity, is another challenge.

Firmware Challenges

• Complexity: Developing firmware that is robust, efficient, and adaptable can be a significant challenge. Firmware must handle various tasks, from hardware control to communication protocols.
• Security: Ensuring the security of embedded systems is paramount. Firmware vulnerabilities can expose systems to cyber threats, making robust security measures essential.
• Compatibility: Firmware must often interact with diverse hardware components, requiring compatibility testing and updates as hardware evolves.

GUI and Dashboards in Embedded Systems

Graphical User Interfaces (GUIs) and dashboards play a crucial role in embedded systems, as they provide an interactive and user-friendly way to control and monitor devices and systems with limited computing resources.

What is Embedded Software?

Embedded software is designed to operate in SWaP optimized non-PC devices. This software is designed for the specific hardware it runs on and often faces some problems due to limited processing power and memory capacity of the device.

A simple example of embedded software can be a controlling of household lighting using an 8-bit microcontroller with minimal memory. It can also be as complex as the software powering modern smart cars. These complex systems manage various electronic components, such as climate control, adaptive cruise control, collision detection, and navigation.

Embedded software and application software differ primarily in their scope and functionality. Embedded software is often serving as the device’s operating system itself. It operates under strict limitations imposed by the device’s functionality, which tightly controls the updates and additions to ensure compatibility.

On the other hand, application software provides specific functionality within a general-purpose computer and operates on a complete OS. This separation means that application software has more flexibility and fewer restrictions when it comes to utilizing system resources.

What is Embedded Firmware?

Firmware serves as a link between the hardware and other software applications that power the system. It is a special type of embedded software that was historically written in read-only memory (ROM) or electrically erasable programmable read-only memory (EEPROM). These earlier forms of firmware were notably unchangeable after initial programming. That is why it is called “firm”.

However, technology has evolved and moved toward storing firmware in Flash memory devices. This advancement offers notable advantages, including easier reprogramming and upgrade capabilities as well as significantly increased storage capacity when compared to its ROM and EEPROM predecessors.

Summing up, the primary role of firmware is to initiate device’s startup process and provide the essential orchestration to support the operation among various hardware components.

Hardware developers use embedded firmware for controlling hardware devices and their functionality similar to the way OS controls the function of software applications. Embedded firmware exists in everything from simple appliances that have computer control, like toasters, to complex tracking systems in missiles. The toaster would likely never need updating but the tracking system sometimes does.

The key difference between Embedded Software vs Firmware

Firmware is just a specific subset of embedded software. Without the operating system and middleware parts, firmware acts as a directional translator only and cannot work without other software layers working on top of it. It is just one layer, whereas a full embedded layer stack is required for a device to function.

Unlike the application software which is updated often, firmware is typically not updated after it is released and  working properly.

If we use a traffic light system analog here is how the embedded system components fit – Hardware (red) is the most difficult to update on a working product, firmware (orange) is not impossible but comes with challenges, and software (green) is easy to update and something that is being updated frequently.

Interested to know more? Get in touch with us for details.

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As the demand for artificial intelligence continues to rise in various industries, from healthcare and finance to manufacturing and autonomous vehicles, industrial computers face the challenge of optimizing AI workloads. Developers are constantly seeking efficient and scalable solutions to solve these challenges. One such solution is using COM Express , a standardized form factor that can be used as a flexible computing platform for various AI workloads.

With the ability to choose from wide variety of CPUs and the flexibility to right-size CPU to target various AI workloads, COM Express empowers organizations to create efficient, scalable, and cost-effective AI solutions. In addition to harnessing the advantages of COM Express, developers can leverage additional AI accelerators to further optimize the solutions. COM-HPC, a new specification, further enables enhanced performance and scalability for high-performance computing applications.

The Intel Alder Lake x86 CPU is an ideal solution for COM Express modules targeting AI workloads due to built-in AI acceleration with Intel Deep Learning Boost technology. This integrated AI capability allows for efficient execution of AI workloads, such as neural network inference and deep learning tasks. By leveraging the built-in AI accelerator, COM Express modules based on Alder Lake can provide optimized performance for AI applications without the need for additional external accelerators.

What is COM Express?

COM Express is a highly integrated and compact computer on module that is designed to offer scalability and flexibility by providing a standardized form factor and interface for integrating different processor architectures and I/O configurations. Introduced by the PCI Industrial Computer Manufacturers Group in 2005, COM Express provides a single circuit board with integrated RAM.

This family of modular, small form factor modules has gained significant traction in various industries, including automation, gaming, retail, transportation, robotics, and medical fields. With eight different types, four sizes, and three major revisions, COM Express promotes vendor technology reuse while catering to mid-range edge processing and networking requirements.

The key differentiator of COM Express from traditional single-board computers (SBCs) lies in its ability to plug off-the-shelf modules into custom carrier boards designed for specific applications. This enables an upgrade path for the CPUs while keeping the carrier board intact. By using a custom COM Express carrier board, all necessary signals can be efficiently routed to the peripherals, while COM Express processor modules serve as the main controller. These advanced features ensure the versatility and adaptability of COM Express for diverse application requirements.

Comparing COM-HPC with COM Express

COM-HPC is an evolution of the COM Express standard, uniquely tailored to address the demands of high-performance computing applications. With its focus on enhanced performance, scalability, and advanced features, COM-HPC caters to the same applications and markets as COM Express, but with notable differentiators. It boasts higher-end CPUs, expanded memory capacity, and increased and faster I/O capabilities. It’s essential to emphasize that COM-HPC does not aim to replace COM Express, rather the two standards exist as distinct entities in the field of embedded computing, offering developers a broader spectrum of choices to meet specific application requirements.

COM-HPC brings significant improvements over COM Express for AI workloads, particularly in terms of PCIe lanes and PCIe generation support:

• Increased PCIe Lanes: One of the key advantages of COM-HPC over COM Express is the availability of more PCIe lanes. COM Express has a limited number of PCIe lanes, which can restrict the connectivity options and the number of I/O interfaces or accelerators that can be integrated. In contrast, COM-HPC modules provide a higher number of PCIe lanes, allowing for more extensive connectivity and the integration of multiple high-speed devices.
• PCIe Gen4/5 Support: Another crucial enhancement in COM-HPC is the support for PCIe Gen4 and Gen5, whereas COM Express supports up to PCIe Gen3. PCIe Gen4 and Gen5 offer higher data transfer rates and improved bandwidth compared to Gen3. This is particularly advantageous for AI workloads that require fast data movement between the CPU, GPU, storage devices, and other peripherals.

In summary, newer generation processors, paired with higher data rates, dramatically lower the size, power and cost requirements of the systems required to perform the AI tasks.

The Advantages of Choosing COM Express for AI Workloads

COM Express offers several distinct advantages when it comes to AI workloads. As a flexible and scalable platform, it provides developers to adapt their AI systems according to specific requirements like CPU performance, power requirements. They can then design a carrier board that integrates the module with additional AI-specific components, such as AI accelerators. Below is the block diagram example of COM Express platform with AI Accelerator.

Here are the key advantages of choosing COM Express (or COM-HPC) for AI workloads:

• Flexibility and Scalability: COM Express allows developers to choose from a wide range of CPU options. Such kind of flexibility allows them to choose the module that best matches the computing needs of their AI workloads. Whether it’s a complex neural network inference or deep learning task, the platform can be customized to deliver optimal performance.
• Modular Design: COM Express follows a modular design approach with a separate CPU module and carrier board. This modularity simplifies system customization and future upgrades. Developers can easily swap out or upgrade the CPU module without redesigning the entire system, saving time and effort while adapting to evolving AI requirements.
• Streamlined Integration: COM Express adheres to industry-standard form factors and interfaces, ensuring compatibility across different vendors. This standardized approach simplifies system integration, reducing development complexity and time to market. Developers can focus on optimizing their AI algorithms and software, confident that the hardware integration will be seamless.
• Rich Connectivity Options: COM Express provides a wide array of interfaces, including Ethernet, USB, PCIe, and DisplayPort interfaces. These interfaces enable effortless integration with various peripherals, sensors, and external devices commonly used in AI applications. The rich connectivity options enhance data I/O capabilities, facilitating efficient communication and interaction within the AI system.
• Long-Term Availability and Support: COM Express offers long-term availability and support, ensuring continuity for AI deployments. This is particularly crucial for industries that rely on stable and long-lasting AI systems. With a consistent platform and extended availability, developers can plan for long-term deployment and maintenance, with access to software updates and technical assistance.
• Cost Optimization: COM Express provides a cost-effective solution for AI workloads. By leveraging COM Express, developers can save on development costs and reduce time to market. The modular design allows for efficient resource allocation, ensuring optimal performance while minimizing unnecessary expenses.
• Time to Market: Since the computer modules are widely available in the embedded marketplace, COM Express enables developers to focus on the IO needs, the addition of accelerators, the AI models and application software.

Real-World Applications of COM Express for AI Workloads

As stated above, COM Express modules offer immense potential for developers to optimize AI workloads on industrial computers, leading to transformative impacts and various implications for cost-effective solutions and large-scale deployments. Let’s delve into real-world examples and insights to showcase the significance of this optimization trend.

In the field of autonomous vehicles, this optimization trend allows autonomous vehicles to navigate complex environments, enhancing safety and efficiency. By leveraging COM Express modules, developers can achieve cost-effective solutions by utilizing existing industrial computers and upgrading them with optimized AI capabilities, resulting in large-scale deployments of autonomous vehicles across transportation networks.

Industrial automation is another area where COM Express systems can revolutionize AI workloads. By optimizing AI algorithms on industrial computers using COM Express modules, developers can achieve significant cost savings and efficiency gains in manufacturing processes. For instance, AI-powered computer vision systems can inspect and detect defects in real-time, improving quality control and reducing production costs. The use of COM Express modules enables industrial computers to handle these AI workloads effectively, making cost-effective solutions viable for large-scale deployment in manufacturing facilities.

In the healthcare sector, COM Express systems can optimize AI workloads on industrial computers to improve diagnostics, patient monitoring, and personalized treatment. For example, by leveraging COM Express systems, developers can enable industrial computers to process complex medical imaging data and apply AI algorithms for more accurate and timely diagnosis. This optimization trend in AI workloads allows healthcare providers to deliver cost-effective, benefiting patients globally.

What to choose

AI accelerators are paired with COM Express module on the carrier as separate modules or integrated directly into the carrier board’s design. This modular approach provides scalability and flexibility, allowing system designers to customize AI processing capabilities to meet the specific requirements of their applications. It also enables easy upgrades or replacements of AI accelerators without having to modify the entire system, making it both cost-effective and future-proof. AI accelerators such as Blaize, Hailo or Axelera paired with COM Express module can provide significant benefits. For example, combining Axelera M.2 AI Edge accelerator module with COM Express Carrier board can achieve up to 120 TOPS of AI performance with the flexibility of switching between the CPU families for optimized compute needs.

These accelerators are specifically designed to enhance AI workloads and provide optimized compute capabilities compared to GPUs. This level of compute power can greatly benefit vision processing applications, which often require intensive computations for tasks such as object detection and classification.

Conclusion

COM Express and COM-HPC offer flexible and scalable platform to enable various AI workloads, allowing developers to customize their systems based on CPU performance, power requirements, and I/O interfaces. CPUs like Intel Alder Lake integrated into COM Express modules provide efficient AI execution, integrated graphics performance, enhanced compute density, ecosystem support, and broad connectivity options. The combination of the CPU with optional AI Accelerator delivers optimized performance, reducing costs and enabling efficient large-scale AI deployments.

With the Tauro Technologies’ team of electronic engineers and designers it becomes possible to design and deploy comprehensive AI processing systems based on x86 and ARM CPUs paired with various AI Accelerators. This strategic approach helps bring down costs and ensures the right balance between compute power and AI processing needed for the system. We can customize the I/O as well as the footprint to fit your application requirements.

Interested to know more? Get in touch with us for details.

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As technology evolves, the automotive industry is constantly seeking ways to make driving safe, reliable, and autonomous. In this blog post, we’ll explore the features, functionality, and the impact that a platform based on dual NVIDIA’s AGX Orin modules offers for the future of vehicle safety during operation. Additionally, we will elaborate on the concept of safety-critical systems and highlight the distinctions between safety-critical functionalities and ADAS (Advanced Driver Assistance System).

The Jetson AGX Orin is designed for advanced robotics and AI edge applications for manufacturing, logistics, retail, service, agriculture, smart city, healthcare, and life science. Dual Orin (2 Orin devices on the same motherboard) offers system redundancy, which refers to the presence of backup or duplicate components that can take over in the event of a failure in the primary system.

ADAS provides driver assistance and convenience, but it is not solely responsible for critical functions that impact safety. Safety-critical functions encompass components directly involved in critical functions such as braking and collision avoidance. Safety-critical systems follow strict standards to ensure reliable operation.

What is Orin?

The NVIDIA Jetson Orin solution is a SOM (system-on-module) with CPU, GPU, memory, power management, and various high-speed interfaces embedded on a single board. NVIDIA Jetson brings accelerated AI performance to the edge in a power-efficient and compact form factor. The Jetson family of modules all use the same NVIDIA CUDA-X software, and support cloud-native technologies like containerization and orchestration to build, deploy, and manage AI at the edge.

NVIDIA’s Orin platform (SoC) has three series for its Jetson products:

• Jetson AGX Orin series
• Jetson Orin NX series
• Jetson Orin Nano series

NVIDIA Jetson Orin modules provide 275 TOPS of AI performance and which increases the performance 8 times compared to Jetson Xavier for multiple concurrent AI inference pipelines, in addition to high-speed interface support for multiple sensors.

One of the major features of NVIDIA Jetson Orin is the DLA (Deep Learning Accelerator) which supports next-generation NVDLA 2.0 with 9x the performance of NVDLA 1.0. It enables the GPU to run more complex networks and dynamic tasks.

A Comparison of Orin with Traditional CPU/GPU

Now, let’s delve into a comparison between traditional processors and Orin by examining the following key features:

• Architecture

NVIDIA Jetson Orin is designed specifically for autonomous machines and edge computing. Jetson AGX Orin modules feature the NVIDIA Orin SoC with a NVIDIA Ampere architecture GPU, Arm® Cortex®-A78AE CPU, next-generation deep learning and vision accelerators, and a video encoder and a video decoder making it highly optimized for tasks like computer vision, deep learning, and robotics.

Traditional CPUs (Central Processing Units) and GPUs (Graphics Processing Units) are more general-purpose processors designed for a wide range of computing tasks, including running operating systems, executing applications, and performing graphics rendering.

• Power Efficiency

NVIDIA Jetson AGX Orin series modules are designed with a high-efficiency Power Management Integrated Circuit (PMIC), voltage regulators, and a power tree to optimize power efficiency. It strikes a balance between performance and energy consumption, allowing for longer battery life and reduced power requirements in embedded systems.

While traditional CPUs and GPUs can offer high computational power, they are generally more power-hungry compared to specialized SoCs like Jetson Orin. They are commonly found in desktops, servers, and workstations where power consumption is less constrained.

• AI Performance

The NVIDIA Jetson AGX Orin series provides server class performance, delivering up to 275 TOPS of AI performance for powering and managing autonomous systems. Its high performance is ideal for tasks like object detection, image recognition, natural language processing, and autonomous navigation.

Traditional CPUs and GPUs can also handle AI workloads, but they do not provide the same level of performance or efficiency as AI-focused modules like Jetson Orin. GPUs, in particular, have been utilized for parallel processing in deep learning tasks, but they are less power-efficient compared to specialized AI chips.

In addition, the Jetson Orin modules are extremely compact, enabling the compute platform to have reduced size and weight – critical for autonomous robots and UAVs.

• Software Ecosystem

NVIDIA Jetson Orin is part of NVIDIA’s Jetson platform, which offers a comprehensive software stack, including drivers, libraries, and frameworks specifically optimized for AI and autonomous applications. It supports popular AI frameworks like TensorFlow, PyTorch, and CUDA, providing developers with familiar tools and resources.

Traditional CPUs and GPUs also have a mature and extensive software ecosystem with support for a wide range of operating systems, development tools, and programming languages. They are compatible with various software frameworks, including those used for AI, but may require additional configuration and optimization for specific AI workloads.

Key differences between NVIDIA Orin and Xavier

NVIDIA Jetson AGX Xavier and NVIDIA Jetson AGX Orin have the same physical footprint and are pin compatible while also being in the same price range with one major difference that the Orin offers much higher performance.

The biggest change change is moving from Nvidia’s Carmel CPU clusters to the ARM Cortex-A78AE on Jeston AGX Orin.
The Orin CPU complex is made up of 12 2.2 GHz cores, each with 64KB Instruction L1 Cache and 64KB Data Cache, and 256 KB of L2 Cache. This enables x1.85 performance increased compared to the eight core Carmel CPU on Jetson AGX Xavier.

Jetson AGX Orin modules deliver an AI performance that can reach 275 TOPS with up to 64 GB of memory, compared to 32 TOPS with up to 32 GB of memory for Jetson Xavier.

Jetson AGX Orin 64GB has 2048 CUDA cores and 64 Tensor cores with up to 170 Sparse TOPS of INT8 Tensor compute, and up to 5.3 FP32 TFLOPs of CUDA compute, while Jetson Xavier has only up to 1.4 FP32 TFLOPs of CUDA compute. Ampere GPU brings support for sparsity, a fine-grained compute structure that doubles throughput and reduces memory usage.

DLA 2.0 provides a highly energy efficient architecture. With this new design, NVIDIA increased local buffering for even more efficiency and reduced DRAM bandwidth. DLA 2.0 additionally brings a set of new features including structured sparsity, depth wise convolution, and a hardware scheduler. This enables up to 105 INT8 Sparse TOPs total on Jetson AGX Orin DLAs compared with 11.4 INT8 Dense TOPS total on Jetson AGX Xavier DLAs.

The 12-core CPU on Jetson AGX Orin 64GB enables 1.85 times the performance compared to the 8-core NVIDIA Carmel CPU on Jetson AGX Xavier. Customers can use the enhanced capabilities of the Cortex-A78AE including the higher performance and enhanced cache to optimize their CPU implementations.

Jetson AGX Orin modules bring support for 1.5 times the memory bandwidth and 2 times the storage of Jetson AGX Xavier, enabling 32GB or 64GB of 256-bit LPDDR5 and 64 GB of eMMC. The DRAM supports a max clock speed of 3200 MHz, with 6400 Gbps per pin, enabling 204.8 GB/s of memory bandwidth.

The combination of NVIDIA’s processing capabilities and power efficiency, along with its safety-critical features, makes it the ideal solution for autonomous applications.

Safety Critical Software in Automotive Safety

Functional safety in processor-based systems is particularly critical in automotive applications. Apart from the ongoing shift towards autonomous vehicles, cars are increasingly dependent on microprocessors to carry out essential operations and must have redundant systems to enable safety in the event of a component failure.

ISO 26262 serves as the globally recognized standard for ensuring functional safety in the automotive industry. This international standard encompasses both the hardware and software components of a vehicle’s electrical and electronic (E/E) systems. Throughout the development process, ISO 26262 outlines specific requirements that must be fulfilled to ensure the safety-related functionality of the system, along with the corresponding processes, methodologies, and tools. By adhering to the ISO 26262 standard, manufacturers can ensure that sufficient safety measures are implemented and maintained throughout the entire lifespan of the vehicle.

ISO 26262 offers comprehensive guidelines on determining acceptable risk levels for systems or components and documenting the testing process. It encompasses the following key aspects:

• Defines an automotive safety lifecycle that covers management, development, production, operation, service, and decommissioning stages, allowing for customization of activities during each phase.
• Implements an automotive-specific risk-based approach for classifying risk levels known as Automotive Safety Integrity Levels (ASILs).
• Utilizes ASILs to specify the required safety measures for achieving an acceptable residual risk.
• Establishes requirements for validation and confirmation measures to ensure the attainment of a satisfactory level of safety.y

Dual AGX Orin Controller Overview

The Dual AGX Orin system offers superior computing power compared to a single Orin solution, making it preferable for specific applications that require higher computational power and redundancy.

The Dual Orin Controller’s computational capacity enables it to handle multiple complex tasks simultaneously. This capability is particularly valuable in scenarios where there is a need for concurrent processing of multiple data streams from various sensors, making it suitable for advanced autonomous machines, commercial vehicles, unmanned distribution vehicles, and unmanned cleaning vehicles.

In safety-critical applications, redundancy is essential to ensure system reliability. The Dual Orin Controller’s utilization of two AGX Orin modules provides a level of redundancy and failover capabilities. If one module encounters an issue, the other can continue functioning, minimizing the risk of critical system failures and improving the overall reliability of the autonomous machine.

Tauro Technologies TT300 Dual AGX Orin Controller

Tauro Technologies’ TT300 Dual AGX Orin compute platform provides exceptional computing power, low energy consumption, in a compact form factor.

With up to 400/550 TOPS of AI performance this product can be used in autonomous vehicles, UAVs and robotics. The product is designed for high reliability and redundancy, provides multi-sensor clock synchronization with sub-nanosecond accuracy and millisecond latency for precise timing.

Let’s take a closer look at TT300 key features:

• Dual Orin Controllers 550 TOPS

The TT300 board is equipped with two powerful Orin controllers, delivering combined processing power of 550 TOPS. This immense computing power enables lightning-fast data processing and analysis, making it ideal for handling complex AI workloads.

• Infineon TC397 Safety MCU

Ensuring the highest levels of safety and reliability, the TT300 board incorporates the Infineon TC397 safety microcontroller to support safety requirements up to ASIL-D. This MCU plays a crucial role in safeguarding the system against potential hazards and maintaining the integrity of critical operations.

• 100Base-T1/1000Base-T1 Ethernet

To facilitate efficient and reliable data communication, the TT300 board is equipped with both 100Base-T1 and 1000Base-T1 Ethernet interfaces. These interfaces enable fast and secure data transfer, ensuring smooth integration into existing vehicle network infrastructures.

• Wi-Fi/4G/5G

TT300 board supports Wi-Fi, 4G LTE and 5G connectivity, enabling seamless wireless communication and remote access. Whether you need to stream data, receive updates, or control the board remotely, these connectivity features have you covered.

• GMSL2 Interface for Hi-Res Cameras

The TT300 board features a GMSL2 interface, enabling reliable connection with high-resolution cameras. This interface supports the transmission of data between the controller and cameras, ensuring high-quality image and video feed for AI applications such as ADAS, object detection, tracking, and recognition.

GMSL cameras are becoming a defacto standard in automotive industry where high data rates and long-distance support is required, addressing the need to transport higher video data rates in automotive video systems.
In addition to high bandwidth transmission, long-distance support, and low latency, GMSL cameras also come with the following features:

• Virtual channel support
• GMSL1 and GMSL2 backward compatibility
• Video duplication
• Automatic Repeat Request (ARQ) feature
• Compatibility with ARM platforms like the NVIDIA Jetson series

I/O Capabilities

TT300 is powered by two NVIDIA Jetson AGX Orin modules and Infineon TC397 safety MCU enables the design to meet ASIL-D highest reliability requirements. The I/O capabilities of the product include automotive as well as industrial ethernet interfaces, USB, wireless connectivity over 4G/5G and Wi-Fi, GMSL camera and LVDS radar interfaces for ADAS applications, as well as CAN and LIN interfaces for automotive and robotics applications routed to CMC connector. Wide selection of interfaces and customization options makes this device easily adaptable to various use cases and application scenarios.

Conclusion

Tauro Technologies’ TT300 is one of the industry’s first platforms to offer the NVIDIA Jetson Orin AGX in a redundant safety-critical setting. This is an ideal system for self-driving vehicles in automotive, mining, and defense sectors as well as autonomous robots and UAVs that require exceptional performance and functional safety certification.
We can customize the I/O as well as the product packaging to fit your application requirements – contact us for details.

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Serial communications protocols are vital to embedded systems.  While UART, I²C, and SPI have been used for short-distance device communication for decades, the benefits are not entirely apparent.

In order to connect peripherals to a computer, one of the following protocols is typically employed: a Universal Asynchronous Receiver Transmitter, (UART) Inter-Integrated Circuit, (I²C) or Serial Peripheral Interface (SPI). This blog will compare and contrast the features of each protocol and help you determine the best fit for your application.   

UART

Universal Asynchronous Receiver Transmitter (UART) is an asynchronous serial communication device with its roots dating back to the telegraph. There is no clock signal to synchronize or validate the data transmitted from the transmitter and received by the receiver (Asynchronous Serial Communication). It sends 1 bit at a time from least significant to most significant and uses start and stop bits to enable precise clocking. During packet transmission, UART uses what is called a parity bit, to enable checking if the information has changed during transmission. 

In addition, data transmission between devices can be in simplex, half-duplex, or full duplex modes.

Data is transmitted at baud rate measured in bits per second – some of the standard baud rates are 4800 bps, 9600 bps, 19200 bps, 115200 bps etc. Out of these, 9600 bps baud rate is the most commonly used.

UARTs must be set for the same bit speed, character length, parity, and stop bits for proper operation on the transmit and receive side. If the receiving UART detects mismatched settings a flag is sent in the host system memory to indicate a failure. 

The data in UART serial communication is organized into blocks called Packets or Frames. The structure of a typical UART data packet or the standard framing of the data is shown in the following table:

Advantages:

• Management is straightforward through hardware. It is utilized by standard protocols including RS-232/485/422.
• Long-distance up to 1km for RS-422/485 buses.
• Requires only two wires for full-duplex data transmission (other than power lines).
• Parity bit ensures basic error checking is integrated into the data packet frame.
• No need for clock or any other timing signal.

Disadvantages:

• Communication is only between two devices where the baud rate, data bit count, parity bit, and stop bit count need to be identical.
• Typically the size of the data frame is limited to only 9 bits (8 data bits, no parity bit and one stop bit).
• Overrun errors if the buffer space is insufficient.
• Size of data in the frame is limited.

I²C

Unlike UART, an Inter-Integrated Circuit is a synchronous serial communication interface and utilizes the system clock. It means that data bits are transferred one by one at regular intervals of time set by a SCL clock line. It is used primarily for short distance, intra-board communication between low speed controllers and processors and is ideal for applications that link up to many components on a bus. Although I²C is typically implemented with a single master and multiple slaves on the bus, it can also be implemented with multiple masters.  Each slave device has a unique address and I²C enables the master to send and request data from a particular slave device utilizing a start bit to the slave address.  

I2C only uses two wires to transmit data between devices:

• SDA (Serial Data) – The line for the master and slave to send and receive data.
• SCL (Serial Clock) – The line that carries the clock signal (common clock signal between multiple masters and multiple slaves).

The structure of a typical I²C Data Packet or the standard framing of the data is shown in the following table (Note: The bold signals are sent by slave and the other signals by master):

Advantages:

• Addressing function enables multiple masters and slaves.
• Control a network of devices with only 2 I/O pins.
• Simple mechanism for validation of data transfer.
• I²C networks are easy to scale. New devices can simply be connected to the two common I²C bus lines.
• No need for prior agreement on data transfer rate as in UART communication.

Disadvantages:

• Slower speed (up to 100 kbit/s in standard mode, 400 kbit/s in fast mode)
• Half-duplex interface.
• Only one slave can be addressed at a time.

SPI

The Serial Peripheral Interface (SPI) is also a synchronous serial communication device which is used primarily for short distance communication. The main difference between SPI and I²C is that SPI uses a full-duplex communication with master-slave topology. Similar to I²C , SPI can be used to access multiple slave devices.

At the beginning of communication, the bus master configures the clock (typically 50 MHz) and sends data to the slave.  During a single SPI clock cycle, a full duplex of data transmission is completed.  Unlike UART, there are no start and stop bits – this enables continuous data transmission and the communication achieves higher speeds than I²C and UART.

The maximum data rate limit is not specified in the SPI interface. Standard data rates include 10 Mbps transfer rate with some devices reaching 100Mbps transfer rate.

The SPI bus consists of 4 signals below:

• Master – Out / Slave – In (MOSI)
• Master – In / Slave – Out (MISO)
• Serial Clock (SCLK)
• Chip Select (CS) or Slave Select (SS)

Depending on the values of Clock Polarity (CPOL) and Clock Phase (CPHA), there are 4 modes of operation of SPI:

• Mode 0 is active when Clock Polarity is LOW and Clock Phase is LOW (CPOL = 0 and CPHA = 0). Data sampled on rising edge and shifted out on the falling edge.
• Mode 1 is active when Clock Polarity is LOW and Clock Phase is HIGH (CPOL = 0 and CPHA = 1). Data sampled on the falling edge and shifted out on the rising edge.
• Mode 2 is active when Clock Polarity is HIGH and Clock Phase is LOW (CPOL = 1 and CPHA = 0). Data sampled on the falling edge and shifted out on the rising edge.
• Mode 3 is active when Clock Polarity is HIGH and Clock Phase is HIGH (CPOL = 1 and CPHA = 1). Data sampled on the falling edge and shifted out on the rising edge.

The structure of a typical SPI data packet or the standard framing of the data is shown in the following image:

Advantages:

• Full-duplex is default for the SPI protocol.
• Slaves do not require a unique address.
• Not limited to 8-bit word size.
• Real-estate savings on embedded boards.
• High data transfer speed.
• No need for individual addresses for slaves as CS or SS chip-select lines are used.
• Only one master device is supported, removing the possibility of conflicts.
• SPI uses less power than I²C.

Disadvantages:

• No protocol-level error checking function and no hardware slave acknowledgement.
• Short distances (up to 10m).
• Each additional slave requires an additional dedicated pin on the master for CS or SS.
• There is no acknowledgement mechanism and hence there is no confirmation of data receipt.
• Slowest device determines transfer speed.

Summary

In general, you can use UART if you are looking for a simple connection between 2 devices, I²C if you are connecting several devices on the same bus, and SPI becomes the ideal choice if you require a faster interface.  Whether you need UART’s tried and true operation, or want to utilize the expansion offered by I²C or the high speed of SPI, Tauro Technologies can implement a system using the most appropriate interface for your project.  

Interested to know more? Get in touch with us for details

The post Serial Protocols & Their Uses: I2C, UART, SPI appeared first on Tauro Technologies.

Most modern laptop or desktop computers have their peripheral devices (storage, media, or cameras) connected to the main processor through a peripheral bus such as PCIe or USB.  Windows or Linux operating systems running on the computer can discover the connected peripherals through a process called enumeration or ‘plug and play’.  This provides information about device type, manufacturer and device configuration thus enabling the OS to load the appropriate drivers for the device and making device operational.  

However, in embedded systems, this is not the case as many peripherals are connected to the main processor using busses such as I2C, SPI, and UART which do not support enumeration.  

To enable the system to recognize the peripheral devices in an embedded system, developers use a Linux Device Tree which is used to provide the hardware description for the operating system.  Prior to using device tree, developers would compile the hardware description into the linux kernel and modify the kernel for each change in platform or peripheral device.  

What is a Device Tree?

A Device Tree is a tree data structure with nodes that describe the devices in a system. Each node has property/value pairs that describe the characteristics of the device being represented. Each node has exactly one parent except for the root node, which has no parent.

In the Device Tree each node is named according to the following convention: <name>[@<unit-address>].

• <name> is a simple ASCII string and can be up to 31 characters in length. In general, nodes are named according to device type it represents. A node for a 3com Ethernet adapter would use the name ethernet, not 3com509.
• <unit-address> component of the name is specific to the bus type on which the node resides. The <unit-address> must match the first address specified in the reg property of the node. If the node has no reg property, the @<unit-address> must be omitted and the <name> alone differentiates the node from other nodes under the same level in the tree hierarchy. In case <name> is used without @<unit-address>, the <name> shall be unique within the same level in the tree hierarchy.

Figure 1 represents simple tree:

• The nodes with the name cpu are distinguished by their unit-address values of 0 and 1.
• The nodes with the name ethernet are distinguished by their unit-address values of fe002000 and fe003000.

A node in the Device Tree can be uniquely identified by specifying the full path from the root node, through all descendant nodes, to the desired node.

The convention for specifying a device path is: /node-name-1/node-name-2/node-name-N.

Each node in the device tree has properties that describe the characteristics of the node. Properties consist of a name and a value. A property value is an array of zero or more bytes that containz information associated with the property.

With the Linux Device Tree, the developers can create a single linux kernel image specific to a processor architecture and create multiple device tree images specific to a platform or a product.  This makes it much easier to support and update the peripheral changes in various products and platforms that one desires to support.

In x86 based platforms, ACPI is commonly used to describe the hardware peripherals and it can be used with or without the Linux Device Tree.  However, in non-x86 platforms such as ARM based systems, Linux Device Tree is becoming the common method of enumerating hardware peripherals.

How is Device Tree data managed?

Data from the Linux Device Tree can be shown in multiple different ways. Usually, the device tree data is in a format that is readable to humans in .dts or .dtsi source files. The Linux kernel pre-processes the dts files before passing them to the device tree compiler.  The source code of the device tree is compiled into a .dtb blob file in a binary format, this format is generally called a Flattened Device Tree (FDT). With this data, the Linux OS is able to find and identify devices in the system. The raw form of the FDT is accessed by the OS during very early stages of the system booting up, but is then further expanded into a kernel data form called the Expanded Device Tree (EDT) so that it can be accessed later during and after the booting up of the system more efficiently. 

As of today, device tree support is enabled in linux kernel for Microblaze, Sparc, ARM, PowerPC and x86 architectures. To unify the handling of description of platforms in various kernel architectures, there is interest to extend device tree support to other platforms.

Device Tree Advantages and Disadvantages:

In summary, here are the advantages and disadvantages of Linux Device Tree.

Advantages of the Linux Device Tree include:

1. It makes changing the configuration of parts of the system very simple without having to recompile any of the linux kernel source code.
2. Easier support for new/additional hardware.
3. Can reuse .dts files that are already existing within the system and can override old functionality. 
4. It makes it easier to understand the descriptions of hardware peripherals.

However, disadvantages include:

1. Creation of .dts files require extensive knowledge of hardware and thus may not be easy to create.
2. Figuring out all the necessary syntax to match the intended system function may be difficult even if the user knows all the bus and device details.

We trust this generic insight into Linux Device Trees is helpful for your system development. Tauro Technologies implements and customizes device trees as part of Board Support Package (BSP) development and board bring-up. 

Interested to know more? Get in touch with us for details

The post Introduction to Linux Device Tree appeared first on Tauro Technologies.

For quite a while, since the rise of smartphones in the late 2000s, the computer processors market has been dominated by ARM central processing units (CPUs) based on the reduced instruction set computer (RISC) architecture. Recently, however, a strong competitor has emerged with a considerably different approach towards the CPU architecture in microprocessors, mobile systems and microcontrollers. The name of this potential ARM killer is RISC-V (pronounced as “risk-five”). 

Over the last couple years, the debate regarding the competition between ARM and RISC-V has been getting more and more vibrant. 

Will RISC-V ultimately replace ARM as the top CPU specification or will both technologies coexist? Let’s take a closer look at these two computer processor architectures, their technical specifications and how they are different from each other. 

What is ARM? 

ARM (originally known as Acorn RISC Machine, ARM stands for Advanced RISC Machines) is a family of RISC instruction set architectures for computer processors, available for various computing devices and environments. 

The ARM CPU architecture is developed by the Arm Ltd company, which licenses the architectures to other companies, allowing them to design their own products that incorporate different components, including interfaces and memory. 

There have been a number of generations of ARM architecture. The original version, ARM1, was introduced in 1985, almost 40 years ago. First application for ARM processors was as an additional second processor for the BBC Micro, providing support to speed up the simulation software. ARM1 used 32-bit internal structure but also had 26-bit address space, limiting it to 64 MB of main memory. This limitation was removed in ARM 3.

ARM 8-A, released in 2011, received the support for 64-bit address space and 64-bit arithmetic. 

ARM processors quickly gained popularity due to their low power consumption, lower costs compared to available alternatives, and minimal heat generation. 

Even though ARM CPUs were widely used since the initial release of this architecture, they really came to power in the late 2000s, upon the release of the first smartphones. Being the best CPU choice for portable devices due to light weight and low power consumption, ARM processors are preferred by the manufacturers of smartphones, tablets and laptops. For the same reasons, ARMs are also widely used in embedded systems. 

According to the official data, more than 200 bln ARM chips have been produced around the world as of 2021. 

What is RISC? 

Since we already mentioned the RISC a number of times, a few words about it need to be said as well. 

RISC is a technology designed to simplify the individual instructions provided to the computer to perform certain tasks. The difference between RISC and CISC (a complex instruction set computer) is that RISC architecture typically requires more instructions provided to a computer in order to complete tasks as individual instructions in RISC are written in simpler code. 

One of the key concepts of RISC computers is that every instruction performs only one function during single CPU cycle. 

What is RISC-V?

RISC-V is basically the fifth generation of the RISC architecture, provided as an open standard instruction set architecture (ISA) based on the RISC standard principles. Unlike the majority of other ISA designs, it is provided under the open source license, so it’s free to use for all the computer chip producers.

The RISC-V specification defines both 32-bit and 64-bit address space options, and additionally includes a description of a 128-bit flat address space variant. 

The RISC-V is a load–store architecture, using IEEE 754 floating-point instructions. RISC-V ISA also includes instruction bit field locations as a way to simplify the use of multiplexers in CPUs. 

Started with a goal to create a practical open source ISA that will be easily deployable in various hardware and software designs, including embedded systems, the RISC-V ISA is a continuation of a long history of CPUs architecture design projects developed at the University of California, Berkeley, since the late 1980s.

History of the RISC-V specification development

The project to develop RISC-V specification was originally started in 2010 by the University of California experts with an intent to create a practicable instruction set that will be available for practical use in various CPUs manufacturing. 

Dr. Krste Asanović, a professor of computer science at UC Berkeley, was an author of the project to develop RISC-V. Eventually, Dr David Patterson, another UC Berkeley professor and one of the creators of the original RISC chips back in the early 1990s, joined the project.

As any ISA needs to be stable for commercial use, the RISC-V Foundation was formed in 2015 with a goal to develop, maintain and publish the intellectual property related to the RISC-V specification. The original authors of the project at UC Berkeley have transferred all the rights to this non-profit corporation controlled by its members.

Currently, the RISC-V Foundation comprises over 325 members, including representatives from companies such as Google, NVIDIA, Microsemi, Western Digital. The RISC-V Foundation members participate in the development of the RISC-V ISA specification and related projects. 

In 2019, due to the U.S. trade regulations concerns as the main reason, the RISC-V Foundation relocated to Switzerland. In 2020, the organization was renamed as RISC-V International, becoming a Switzerland-registered nonprofit business association.

Today, the RISC-V International publishes all the documentation and specifications related to RISC-V designs, which remains open source and available for everyone to use free of charge. However, only the members of RISC-V International can vote to approve any changes to RISC-V specifications. 

ARM vs RISC-V Comparison 

Here’s a table comparing technical specifications of ARM and RISC-V. 

Final thoughts. ARM vs RISC-V: Which one to choose? 

As you can probably tell from the comparison chart above, there is no simple answer to this question. 

In many ways, right now, ARM-based CPUs are still a better option, mainly due to much longer lifecycle and the fact that ARM Ltd has invested billions of dollars into this specification over the years. ARM processors have a huge market share, being used in the majority of smartphones, as well as laptops and even PCs that are choosing ARM instead of x86 architecture-based designs. 

We could say, however, that RISC-Vs are the future and a very strong contender to the throne of the most used computer processors architecture. RISC-V can provide better performance using a minimum amount of power. The fact that RISC-V is open source and free to use by any processor manufacturers is also a huge advantage.

Some manufacturers, such as Western Digital, for example, have already started implementing the RISC-Vs in their microcontrollers attached to RAMs and SSDs. 

RISC-V is also getting increasingly popular in IoT devices and embedded systems of various kinds, due to its highly scalable nature. But it will undoubtedly take several years for industry players to transition to using RISC-V instead of ARM-based designs. 

The Tauro Technologies’ team of electronic engineers and designers has a proven track record of successfully designing custom hardware for various kinds of products in multiple technology fields. Drawing on the specific needs of our clients, we select and apply various engineering methods to electronic product development and manufacturing in order to achieve the desired result. Utilizing our in-house PCB assembly and debug expertise, we are able to build and evaluate your prototypes before high-volume manufacturing, rapidly and cost-efficiently. 

Interested to know more? Get in touch with us for details.

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The demand for embedded systems across various industries and technology fields today is as high as ever before. Embedded systems are essential to many electronic devices and automated solutions that we are increasingly relying upon. So it comes as no surprise that the global embedded systems market is rapidly growing. According to a recent study, the total size of the embedded systems market is expected to reach $116.2bn by 2026 from $86.5bn last year, growing at a CAGR of 6.3% from 2021 to 2026. 

Even the COVID pandemic and global economic turbulence caused by this healthcare crisis weren’t able to disrupt the consistent growth of the embedded systems market. As the authors of an older market study noted, even though low demand for consumer electronic devices due to COVID lockdowns had its negative impact, it was balanced by the increasing need for various embedded hardware components for the healthcare industry. 

Six most interesting embedded systems industry trends in 2022 

The abundance of technological and market development trends is another sign that we have all the reasons to feel optimistic about the evolution of the embedded systems industry going forward. 

 Let’s take a closer look at some of the most interesting and noteworthy trends that, in our opinion, will influence the embedded systems industry in 2022 and over the next few years. 

Automotive industry driving embedded systems market growth

When it comes to the applications of embedded systems, the automotive industry today is one of the main drivers of market growth. This trend will most likely further increase in 2022 as well, fueled by continuously rising demand for electric and hybrid vehicles across the globe. The manufacturers of electric and hybrid vehicles rely on embedded systems in a variety of smart electronic components such as advanced driver-assistance systems (ADAS), power control units, engine cooling systems, etc. Additionally, automotive and mobile robotics industries are also rapidly adopting autonomous technologies and further require the integration of LIDAR, camera, sensor and power subsystems. All these components rely on embedded systems for centralization and coordination on processes. 

Explosive demand for military embedded systems 

As you may know, embedded systems play a vitally important role in many devices and electronic machine components used for military applications. The demand for weaponry and advanced military equipment has already been on the rise in recent years as a result of escalating regional tensions and geopolitical rivalry around the globe. And we can expect the boost in development of the military embedded systems market as most NATO countries are significantly increasing their defense budgets. Military embedded systems are used in land, sea, and air warfare theaters for a large variety of applications, including unmanned vehicles, counter UAV systems, surveillance systems, weapons guidance systems, communication equipment, command and control solutions, satellite communications, etc. 

Following the evolution of military systems, we can clearly see that not just the commercial sector companies are looking to implement AI, 5G, cloud computing, and other technological innovations. Many defense contractors are also interested in tech innovations as a way to produce more advanced systems. 

Wider AI and ML integration 

Artificial intelligence (AI) has been one of the most significant technology trends in recent years. AI and ML (machine learning) solutions continue to gain momentum and spread across a variety of industries and market segments. 

The embedded systems are not an exception, even though AI and ML solutions traditionally have been challenging to implement in embedded systems due to their hardware and framework limitations. But new hardware solutions along with innovative techniques used for inference processing, data curation and performance acceleration help to overcome these obstacles. In 2022, we expect to see even more new embedded implementations leveraging AI and ML technologies. 

NVIDIA products are widely used for training and inferencing applications in many AI systems, and Tauro Technologies has been building these systems from their early days. As the industry evolves, other silicon and software solutions are emerging that promise to offer better price–performance ratio for many machine vision applications.

Embedded security and defense against cyber threats 

Cyberattacks and information security breaches have been on the rise for a number of years now. And it’s not a secret that embedded systems are known to be vulnerable to hacker attacks and cybersecurity threats of various kinds. There are multiple reasons why embedded systems often fail to provide the appropriate level of protection against cyber threats: poor access control or authentication settings, no regular security updates, remote deployment, reliance on legacy hardware, etc. 

This is why the development of embedded security software and hardware is on the rise in recent years, as well as the standards for the security level in embedded hardware designs. Specifically, we have noticed a rise of embedded systems that implement TPM, AES encryption, and FIPS 140 technologies on hardware platforms.

 5G technologies and 5G-based embedded systems 

The ongoing deployment of 5G infrastructure is expected to be a major growth driver for a variety of technology fields, mainly telecommunications, industrial automation, internet of things (IoT), automotive, etc. The demand for embedded systems based on 5G architecture will also be increasing along with overall 5G implementation progress. Growing communications and processing speed, achieved with 5G architecture, without a doubt will be very helpful to solve the performance issues typical for embedded systems based on communication standards of previous generations.

Virtual and augmented reality with embedded systems

Virtual reality (VR) and augmented reality (AR) is another major tech industry niche that has been trending for a while, keeps gaining momentum year after year, and received an additional boost thanks to COVID pandemic and increasing global turbulence overall. VR/AR solutions have a wide range of cost-saving and efficiency-improving applications. Modern-day feature-rich virtual environments cannot function without complex high-performance embedded systems. They allow VR/AR solutions to match movements of the user with rendering of graphics, sound and text in real time. We have seen early applications of VR/AR in skills development and training both for industrial and military purposes, which is why we expect the demand for such complex VR/AR embedded systems to increase in 2022 as well. 

Final thoughts 

Some of the other notable embedded systems industry trends that we didn’t mention in this article are the rapidly growing real-time segment of the market, rising popularity of Python as the main programming language for embedded systems software, related IoT development trends, and more. 

What’s also worth mentioning, all six industry trends described above are connected and, in many ways, are fueling each other’s growth. For example, the demand for autonomous vehicles, robotics and AI technologies in commercial and military systems drives the demand for faster 5G communication that can enable the network speed required to fully implement these tech innovations.

Based on the foregoing, it is safe to say that the demand for embedded systems across market niches and applications will be on the rise at least for the next ten years or so. In this increasingly complex and competitive business environment, the importance of professional approach to IoT and embedded systems design starts to play an even more important role. 

The Tauro Technologies’ team of electronic engineers and designers has a proven track record of successfully designing custom hardware for various kinds of products in multiple technology fields. Drawing on the specific needs of our clients, we select and apply various engineering methods to electronic product development and manufacturing in order to achieve the desired result. Utilizing our in-house PCB assembly and debug expertise, we are able to build and evaluate your prototypes before high-volume manufacturing, rapidly and cost-efficiently. 

Interested to know more? Get in touch with us for details.

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